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PD - 91852G
RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2)
Product Summary
Part Number Radiation Level IRHNA57064 100K Rads (Si) IRHNA53064 300K Rads (Si) IRHNA54064 600K Rads (Si)
IRHNA57064 JANSR2N7468U2 60V, N-CHANNEL
REF: MIL-PRF-19500/673
5
TECHNOLOGY
RDS(on) ID QPL Part Number 0.0056 75*A JANSR2N7468U2 0.0056 75*A JANSF2N7468U2 0.0056 75*A JANSG2N7468U2
IRHNA58064 1000K Rads (Si) 0.0065 75*A JANSH2N7468U2 International Rectifier's R5 TM technology provides high performance power MOSFETs for space applications. These devices have been characterized for Single Event Effects (SEE) with useful performance up to an LET of 80 (MeV/(mg/cm2)). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters.
SMD-2
Features:
n n n n n n n n n
Single Event Effect (SEE) Hardened Ultra Low RDS(on) Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Ceramic Package Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 12V, TC = 25C ID @ VGS = 12V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current A Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy A Avalanche Current A Repetitive Avalanche Energy A Peak Diode Recovery dv/dt A Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight * Current is limited by package For footnotes refer to the last page 75* 75* 300 250 2.0 20 500 75 25 4.4 -55 to 150 300 (for 5s) 3.3 (Typical)
Pre-Irradiation
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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1
06/09/04
IRHNA57064, JANSR2N7468U2
Pre-Irradiation
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BVDSS/TJ Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage g fs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
60 -- -- 2.0 45 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.065 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 -- -- 0.0056 4.0 -- 10 25 100 -100 160 55 65 35 125 75 50 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 12V, ID = 75A A VDS = VGS, ID = 1.0mA VDS 15V, IDS = 75A A VDS=48V ,VGS=0V VDS = 48V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =12V, ID = 45A VDS = 30V VDD = 30V, ID = 45A, VGS =12V, RG = 2.35
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Ciss C oss C rss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
6080 2310 90
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD trr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 75* 300 1.3 200 538
Test Conditions
A
V nS nC Tj = 25C, IS = 75A, VGS = 0V A Tj = 25C, IF = 45A, di/dt 100A/s VDD 25V A
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction-to-Case Junction-to-PC board
Min Typ Max
-- -- -- 1.6 0.5 --
Units
C/W
Test Conditions
soldered to a 2 square copper-clad board
Note: Corresponding Spice and Saber models are available on International Rectifier web site. For footnotes refer to the last page
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Radiation Characteristics
IRHNA57064, JANSR2N7468U2
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25C, Post Total Dose Irradiation AA
Parameter
BVDSS VGS(th) IGSS IGSS IDSS RDS(on) RDS(on) VSD Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source A On-State Resistance (TO-3) Static Drain-to-Source A On-State Resistance (SMD-2) Diode Forward Voltage A Up to 600K Rads(Si)1 1000K Rads (Si)2 Units Min Max Min Max 60 2.0 -- -- -- -- -- -- -- 4.0 100 -100 10 0.0061 0.0056 1.3 60 1.5 -- -- -- -- -- -- -- 4.0 100 -100 25 0.0071 0.0065 1.3 V nA A V
Test Conditions
VGS = 0V, ID = 1.0mA VGS = VDS, ID = 1.0mA VGS = 20V VGS = -20 V VDS =48V, VGS =0V VGS = 12V, ID =45A VGS = 12V, ID =45A VGS = 0V, IS = 45A
1. Part numbers IRHNA57064 ( JANSR2N7468U2 ), IRHNA53064 ( JANSF2N7468U2 ) and IRHNA54064 ( JANSG2N7468U2 ) 2. Part number IRHNA58064 ( JANSH2N7468U2 )
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion Br Xe Au LET (MeV/(mg/cm2)) 37.3 63 86.6 Energy (MeV) 285 300 2068 VDS (V) Range (m) @VGS =0V @VGS= -5V @VGS= -10V @VGS=-15V @VGS=-20V 36.8 60 60 60 60 40 29 46 46 35 25 15 106 35 35 27 20 14
70 60 50 40 30 20 10 0 0 -5 -10 VGS -15 -20
VDS
Br Xe Au
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA57064, JANSR2N7468U2
Pre-Irradiation
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
1000
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
100
5.0V
5.0V
10 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
VDS , Drain-to-Source Voltage (V)
10 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
TJ = 25 C TJ = 150 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 75A
I D , Drain-to-Source Current (A)
1.5
100
1.0
0.5
10 5.0
V DS = 15 25V 20s PULSE WIDTH 5.5 6.0 6.5 7.0 7.5 8.0
VGS , Gate-to-Source Voltage (V)
0.0 -60 -40 -20
VGS = 12V
0 20 40 60 80 100 120 140 160
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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Pre-Irradiation
IRHNA57064, JANSR2N7468U2
10000
8000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 45A
VDS = 48V VDS = 30V
16
C, Capacitance (pF)
6000
Ciss Coss
12
4000
8
2000
4
0
Crss
1 10 100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 25 50 75 100 125 150 175 200
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
100
TJ = 150 C
100s 1ms
10 Tc = 25C Tj = 150C Single Pulse 1 10
100
TJ = 25 C
10ms
10 0.4
V GS = 0 V
0.6 0.8 1.0 1.2 1.4 1.6
1
VSD ,Source-to-Drain Voltage (V)
100
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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5
IRHNA57064, JANSR2N7468U2
Pre-Irradiation
160
LIMITED BY PACKAGE
VDS VGS
RD
ID , Drain Current (A)
120
RG VGS
D.U.T.
+
-V DD
80
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
40
VDS 90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.1
0.01
0.001 0.00001
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Pre-Irradiation
IRHNA57064, JANSR2N7468U2
1000
EAS , Single Pulse Avalanche Energy (mJ)
15V
800
ID 33.5A 47.4A BOTTOM 75A TOP
VDS
L
DRIVER
600
RG
D.U.T.
IAS tp
.
+ V - DD
VGS 20V
A
400
0.01
Fig 12a. Unclamped Inductive Test Circuit
200
0
25
V(BR)DSS tp
StartingJT , Junction Temperature ( C)
50
75
100
125
150
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
12 V
QGS
QGD
VGS
3mA
D.U.T.
+ V - DS
VG
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRHNA57064, JANSR2N7468U2
Pre-Irradiation
A Pulse width 300 s; Duty Cycle 2% A Total Dose Irradiation with VGS Bias.
Footnotes:
A Repetitive Rating; Pulse width limited by
maximum junction temperature. A VDD = 25V, starting TJ = 25C, L= 0.18mH Peak IL = 75A, VGS = 12V A ISD 45A, di/dt 196A/s, VDD 60V, TJ 150C 12 volt VGS applied and V DS = 0 during irradiation per MIL-STD-750, method 1019, condition A. A Total Dose Irradiation with VDS Bias. 48 volt VDS applied and V GS = 0 during irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions -- SMD-2
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 06/2004
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